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Матлаб моделирование и vhdl код
апр 12, 2019 | 14:04
function [ output_args ] = p( v, t, m )
%UNTITLED Summary of this function goes here
% Detailed explanation goes here
% p(v,t,m) = sum k, от 0 до m-1: (f(k,v)*(t-v)^k)/k!
% where f (k, v) — any functions in R space
end
library ieee;
use ieee.std_logic_1164.all;
entity image_processing is
GENERIC(
NUM_BIT: POSITIVE := 1
--NUM_BIT: POSITIVE := N_BITS_IN;
--NUM_BIT_FILT: POSITIVE := N_BIT_FILT
);
Port ( clk: in STD_LOGIC;
x_real: in std_logic_vector(0 to 63);
x_imag: in std_logic_vector(0 to 63);
h_real: in std_logic_vector(0 to 31);
h_imag: in std_logic_vector(0 to 31);
y_real: out std_logic_vector(0 to 127);
y_imag: out std_logic_vector(0 to 127));
end image_processing;
architecture bhv of image_processing is
begin
end bhv;
%UNTITLED Summary of this function goes here
% Detailed explanation goes here
% p(v,t,m) = sum k, от 0 до m-1: (f(k,v)*(t-v)^k)/k!
% where f (k, v) — any functions in R space
end
library ieee;
use ieee.std_logic_1164.all;
entity image_processing is
GENERIC(
NUM_BIT: POSITIVE := 1
--NUM_BIT: POSITIVE := N_BITS_IN;
--NUM_BIT_FILT: POSITIVE := N_BIT_FILT
);
Port ( clk: in STD_LOGIC;
x_real: in std_logic_vector(0 to 63);
x_imag: in std_logic_vector(0 to 63);
h_real: in std_logic_vector(0 to 31);
h_imag: in std_logic_vector(0 to 31);
y_real: out std_logic_vector(0 to 127);
y_imag: out std_logic_vector(0 to 127));
end image_processing;
architecture bhv of image_processing is
begin
end bhv;